This invention relates to a track-and-hold circuit comprising an input stage coupled to an input terminal for receiving an input signal, an output stage coupled to an output terminal for supplying an output signal, and a switching stage coupled between the input stage and the output stage. The switching stage comprises a switching transistor having a base coupled to the input stage, a collector coupled to a first supply terminal, and having an emitter coupled to the output stage, a differential amplifier having a first input for receiving a hold signal, a second input for receiving a tracking signal, a common terminal coupled to a second supply terminal by means of a current source, a first output coupled to the base of the switching transistor, and having a second output coupled to the emitter of the switching transistor, and a capacitor coupled between the emitter of the switching transistor and one of the supply terminals.
Such a track-and-hold circuit can be used in, for example, an analog-to-digital converter.
Such a track-and-hold circuit has a tracking mode, in which the switching transistor is in a conductive state as a result of the tracking signal applied to the differential amplifier, and a hold mode, in which the switching transistor is in a cut-off state as a result of the hold signal applied to the differential amplifier. Owing to the state of the switching transistor the output signal in the tracking mode is dictated by the input signal and the output signal in the hold mode is dictated by a voltage built up across the capacitor during the tracking mode. As in the hold mode the voltage built up across the capacitor decreases as a result of an input current required by the output stage, the tracking signal and the hold signal are limited by a minimum frequency imposed by the input current.
Such a track-and-hold circuit is known from, inter alia, Japanese Kokai 63-119100, the track-and-hold circuit described in said Kokai having an input stage comprising at least one pnp transistor having a base coupled to the input terminal, a collector coupled to the second supply terminal, and having an emitter coupled to the base of the switching transistor, and a current source coupled between the base of the switching transistor and the first supply terminal. By means of the pnp transistor the input stage produces a control voltage for the switching stage, which voltage is related to the input signal, which is limited by a maximum frequency imposed by the pnp transistor.